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Arnaud Lacourt

Loved the event, very well done. I especially loved the examples of full supply chain projects bringing premiums back to the farmer with CPG long-term commitments. 

2024 Start-Up Guide
Helen Byrne Full Spotlight

Eleanor Root Testimonial

High quality panels discussing hot topics with engaged and interactive audiences provided a great environment for good discussions

Michael Binns Testimonial

This conference, with its carefully curated panels, was engaging and fostered an atmosphere ripe for learning and networking

 

Connie Zhang

CEO
Rent|Vest

Decades of working experience spans Data & Analytics | Digital Transformation | FE@MBS/RMBS Prepayment across Banking Finance | Hedge funds | Proptech | FinTech | Pharma. Has built rounds of end-to-end data product with DM/DG & AI/ML capability with data standardization over 2K data feeds. MBA @ Investment Management, BS and MS @Computer Science & CFA.

Connie Zhang

CEO
Rent|Vest

Connie Zhang

CEO
Rent|Vest

Decades of working experience spans Data & Analytics | Digital Transformation | FE@MBS/RMBS Prepayment across Banking Finance | Hedge funds | Proptech | FinTech | Pharma. Has built rounds of end-to-end data product with DM/DG & AI/ML capability with data standardization over 2K data feeds. MBA @ Investment Management, BS and MS @Computer Science & CFA.

Author:

Mike Howard

Vice President of DRAM and Memory Markets
TechInsights

Mike has over 15 years of experience tracking the DRAM and memory markets. Prior to TechInsights, he built the DRAM research service at Yole. Prior to Yole, Mike spent time at IHS covering DRAM and Micron Technology where he had roles in engineering, marketing, and corporate development. Mike holds an MBA from The Ohio State University and a BS in Chemical Engineering and BA in Finance from the University of Washington.

 

Mike Howard

Vice President of DRAM and Memory Markets
TechInsights

Mike has over 15 years of experience tracking the DRAM and memory markets. Prior to TechInsights, he built the DRAM research service at Yole. Prior to Yole, Mike spent time at IHS covering DRAM and Micron Technology where he had roles in engineering, marketing, and corporate development. Mike holds an MBA from The Ohio State University and a BS in Chemical Engineering and BA in Finance from the University of Washington.

 

Author:

Murali Emani

Computer Scientist
Argonne National Lab

Murali Emani is a Computer Scientist in the Data Science group with the Argonne Leadership Computing Facility (ALCF) at Argonne National Laboratory. At ALCF, he co-leads the AI Testbed where they explore the performance, efficiency of novel AI accelerators for scientific machine learning applications. He also co-chairs the MLPerf HPC group at MLCommons, to benchmark large scale ML on HPC systems. His research interests are in Scalable Machine Learning, AI accelerators, AI for Science, and Emerging HPC architectures.  His current work includes

- Developing performance models to identifying and addressing bottlenecks while scaling machine learning and deep learning frameworks on emerging supercomputers for scientific applications.

- Co-design of emerging hardware architectures to scale up machine learning workloads.

- Efforts on benchmarking ML/DL frameworks and methods on HPC systems.

 

Murali Emani

Computer Scientist
Argonne National Lab

Murali Emani is a Computer Scientist in the Data Science group with the Argonne Leadership Computing Facility (ALCF) at Argonne National Laboratory. At ALCF, he co-leads the AI Testbed where they explore the performance, efficiency of novel AI accelerators for scientific machine learning applications. He also co-chairs the MLPerf HPC group at MLCommons, to benchmark large scale ML on HPC systems. His research interests are in Scalable Machine Learning, AI accelerators, AI for Science, and Emerging HPC architectures.  His current work includes

- Developing performance models to identifying and addressing bottlenecks while scaling machine learning and deep learning frameworks on emerging supercomputers for scientific applications.

- Co-design of emerging hardware architectures to scale up machine learning workloads.

- Efforts on benchmarking ML/DL frameworks and methods on HPC systems.

 

Author:

Nuwan Jayasena

Fellow
AMD

Nuwan Jayasena is a Fellow at AMD Research, and leads a team exploring hardware support, software enablement, and application adaptation for processing in memory. His broader interests include memory system architecture, accelerator-based computing, and machine learning. Nuwan holds an M.S. and a Ph.D. in Electrical Engineering from Stanford University and a B.S. from the University of Southern California. He is an inventor of over 70 US patents, an author of over 30 peer-reviewed publications, and a Senior Member of the IEEE. Prior to AMD, Nuwan was a processor architect at Nvidia Corp. and at Stream Processors, Inc.

Nuwan Jayasena

Fellow
AMD

Nuwan Jayasena is a Fellow at AMD Research, and leads a team exploring hardware support, software enablement, and application adaptation for processing in memory. His broader interests include memory system architecture, accelerator-based computing, and machine learning. Nuwan holds an M.S. and a Ph.D. in Electrical Engineering from Stanford University and a B.S. from the University of Southern California. He is an inventor of over 70 US patents, an author of over 30 peer-reviewed publications, and a Senior Member of the IEEE. Prior to AMD, Nuwan was a processor architect at Nvidia Corp. and at Stream Processors, Inc.

Author:

Simone Bertolazzi

Principal Analyst, Memory
Yole Group

Simone Bertolazzi, PhD is a Senior Technology & Market analyst, Memory, at Yole Intelligence, part of Yole Group, working with the Semiconductor, Memory & Computing division. As member of the Yole’s memory team, he contributes on a day-to-day basis to the analysis of memory markets and technologies, their related materials, device architectures and fabrication processes. Simone obtained a PhD in physics in 2015 from École Polytechnique Fédérale de Lausanne (Switzerland) and a double M. A. Sc. degree from Polytechnique de Montréal (Canada) and Politecnico di Milano (Italy), graduating cum laude.

Simone Bertolazzi

Principal Analyst, Memory
Yole Group

Simone Bertolazzi, PhD is a Senior Technology & Market analyst, Memory, at Yole Intelligence, part of Yole Group, working with the Semiconductor, Memory & Computing division. As member of the Yole’s memory team, he contributes on a day-to-day basis to the analysis of memory markets and technologies, their related materials, device architectures and fabrication processes. Simone obtained a PhD in physics in 2015 from École Polytechnique Fédérale de Lausanne (Switzerland) and a double M. A. Sc. degree from Polytechnique de Montréal (Canada) and Politecnico di Milano (Italy), graduating cum laude.

Author:

Nan Ding

Research Scientist
Berkeley Research Lab

Nan Ding is a Research Scientist in the Performance and Algorithms group of the Computer Science Department at Lawrence Berkeley National Laboratory. Her research interests include high-performance computing, performance modeling and performance optimization. Nan received her Ph.D. in computer science from Tsinghua University, Beijing, China in 2018.

Nan Ding

Research Scientist
Berkeley Research Lab

Nan Ding is a Research Scientist in the Performance and Algorithms group of the Computer Science Department at Lawrence Berkeley National Laboratory. Her research interests include high-performance computing, performance modeling and performance optimization. Nan received her Ph.D. in computer science from Tsinghua University, Beijing, China in 2018.